NEWSROOM

No Need To Suffer When You Want To Sing The Blues
By Mark Long - e-inSITE, 9 Dec 2002.

Silicon Interfaces has announced the availability of Bluetooth and USB 2.0 verification intellectual property (IP) for ensuring a thorough protocol checking as well as reducing for time constraints involved in the verification of complex Bluetooth and USB 2.0 design interfaces.

"With the increasing pressure of time-to-market deadlines and design cycle reductions, our customers can reap significant benefits, including greater productivity and reduced verification costs, by using OVA-based Bluetooth and USB checkers," claimed program manager Kiran Patel in a statement. "Our own productivity has more than doubled by using OVA instead of hardware description language (HDL)-based verification IP."

The company's Bluetooth 1.1 Checker Key features a design based on the Bluetooth specification (Version 1.1) featuring reusable IP blocks for the implementation of all real-time Bluetooth protocol functions.

Suitable for SoC verification, the Checker Key also offers a Piconet/scatternet function with multi-slot packets, together with data channel support, packet processing, authentication and hardware encryption, as well as cyclic redundancy check and forward error correction.

The USB 2.0 Checker Key features a protocol engine that may be used to control the flow of events. For the verification of higher speed devices, the USB 2.0 version of the checker Key supports bulk, interrupt and isochronous type transfers as well as control transfers by endpoint zero. Also on tap: an automatic data retry mechanism, aremote wake-up function, 4KB data buffer and a microcontroller interface.

Fully compatible with simulators that support OVA, the Bluetooth and USB 2.0 OVA verification IP are available right now. In addition, both the Bluetooth and USB 2.0 OVA protocol checkers include complete documentation set illustrating usage and configuration.

"The OVA community is requesting OVA verification checkers and IP to jumpstart their verification environments," said OpenVera program manager James Watts at Synopsys, Inc. "The OpenVera community welcomes the availability of Silicon Cores' OVA-based verification IP, marking growing support for the language."

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Design Verification and Service Companies Address Growing Demand for Assertion-Based Methodology by Offering Verification Intellectual Property

MOUNTAIN VIEW, Calif., December 9, 2002 - Synopsys, Inc. (Nasdaq:SNPS), the technology leader for complex integrated circuit (IC) design, today announced the availability of seven new third party verification intellectual property (IP) offerings based on OpenVera™Assertions (OVA). Designed for checking compliance with widely adopted and emerging protocols, OVA verification IP are reusable modules that accelerate the development of a complete verification environment, improving overall efficiency and productivity for design and verification engineers. With the release of these OVA verification IP offerings, third party IP providers Cold Spring Engineering, nSys and Silicon Interfaces join the growing list of design verification and service providers who support OVA for customers seeking an assertion-based methodology to overcome the verification bottleneck. "Our customers are demanding assertion-based verification IP for up and coming standards such as PCI Express, and we are responding by developing models based on OVA," said Anil Tickoo, director of sales and marketing at nSys. "With its high-level of abstraction, OVA allowed us to quickly create IP that let our customers verify complex functionality using both dynamic and formal verification methods. The end result is that engineers who use our OVA-based IP find corner-case and hard-to-find bugs earlier in the design schedule."

OpenVera Assertions Verification IP Available

OpenVera Assertions is a high-level verification language that enables an assertion-based methodology for improving verification productivity, and is supported by a library of reusable IP. Design and verification engineers use OVA's powerful declarative constructs to easily create and maintain concise verification code. With a growing list of tool support, OVA IP can easily be utilized across a variety of verification tools - simulation, testbench, debug, and formal analysis. Furthermore, OVA IP allow verification engineers to focus on verifying intended behavior of their designs rather than spending an inordinate amount of time setting up verification environments. New OVA verification IP are available from the following companies:

Company	OpenVera Assertions Verification IP Offerings
Cold Spring Engineering	Utopia 2.0, SPI 4.2
nSys	PCI Express, PCMCIA, UART, Parallel 1284
Silicon Interfaces	Bluetooth, USB 2.0

"Increased interest in OVA and its growing appeal to vendors and users is driving this latest round of verification IP from these providers," said James Watts, OpenVera program manager at Synopsys, Inc. "We continue to welcome design and verification solution providers to develop OVA verification IP through our successful OpenVera Catalyst Program. When they join the program, providers become part of a broad network of verification companies with expert tool and methodology knowledge in leading verification solutions."

About OpenVera and OpenVera Assertions

OpenVera is an open source hardware verification language developed to meet the unique requirements of functional verification. OpenVera Assertions (OVA) is a high-level language that contains powerful declarative constructs for accurately capturing design specification and is useful in both dynamic and formal verification environments. With these languages, design and verification engineers describe the target application environment, including complex protocols and data objects, at a high level of abstraction, which significantly improves productivity, readability and reusability. For more information on OpenVera and OVA, visit www.open-vera.com.

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•  Silicon Interfaces Announces Bluetooth and USB 2.0 OpenVera Assertions-Based Verification Intellectual Property

Monday December 9, 9:11 am ET (Press Release : Source: Synopsys, Inc. Today's News On The Net - Business Wire's full file on the Internet)

Powerful Models for System-on-a-Chip Designs Significantly Reduce Verification Time CAMPBELL, Calif.--(BUSINESS WIRE)--Dec. 9, 2002-- Silicon Interfaces, a high-end design services provider, today announced the availability of Bluetooth and USB 2.0 verification intellectual property (IP) offerings based on OpenVera(TM) Assertions (OVA). These easy-to-use OVA verification IP solutions significantly reduce the time necessary to create the verification infrastructure and automated testbench environment required for verifying complex Bluetooth and USB 2.0 design interfaces, and ensure thorough protocol checking. The Bluetooth and USB 2.0 verification IP increase the portfolio of Silicon Interfaces' OpenVera-based verification IP and are available through Silicon Cores, a wholly-owned subsidiary of Silicon Interfaces.

"With the increasing pressure of time-to-market deadlines and design cycle reductions, our customers can reap significant benefits, including greater productivity and reduced verification costs, by using OVA-based Bluetooth and USB checkers," said Kiran Patel, program manager of Silicon Cores' IP Development Program. "Our own productivity has more than doubled by using OVA instead of hardware description language (HDL)-based verification IP."

"The OVA community is requesting OVA verification checkers and IP to jumpstart their verification environments," said James Watts, OpenVera program manager at Synopsys, Inc. (Nasdaq:SNPS - News) "The OpenVera community welcomes the availability of Silicon Cores' OVA-based verification IP, marking growing support for the language."

Bluetooth 1.1 Checker Key Features:
•  Design based on the Bluetooth specification (Version 1.1)
•  Reusable IP blocks that implement all real-time Bluetooth protocol functions
•  Suitable for SoC verification
•  Piconet/scatternet function with multi-slot packets
•  Supports data channels
•  Consideration of low power mode during early design cycle
•  Time critical packet processing
•  Authentication and hardware encryption along with cyclic redundancy check and forward error correction

USB 2.0 Checker Key Features:

•  Robust protocol layer, which includes protocol engine used to control the flow of events
•  Supports high speed devices
•  Supports bulk, interrupt and isochronous type transfers
•  Support for control transfers by endpoint zero
•  Automatic data retry mechanism
•  Highly intelligent remote wake-up function
•  Integrated 4K bytes on chip-data buffer
•  Backward compatibility
•  Microcontroller interface

For a complete listing of Bluetooth and USB 2.0 protocol checkers features and pricing, please contact info@siliconinterfaces.com or visit the Silicon Cores web site at www.siliconcores.com

Availability The Bluetooth and USB 2.0 OVA verification IP are available now and are compatible with simulators that support OVA. The Bluetooth and USB 2.0 OVA protocol checkers come with a complete documentation set illustrating usage and configuration. About OpenVera and OpenVera Assertions OpenVera is an open source hardware verification language developed to meet the unique requirements of functional verification. OpenVera Assertions (OVA) is a high-level language that contains powerful declarative constructs for accurately capturing design specification and is useful in both dynamic and formal verification environments. With these languages, design and verification engineers describe the target application environment, including complex protocols and data objects, at a high level of abstraction, which significantly improves productivity, readability and reusability. For more information on OpenVera and OVA, visit www.open-vera.com.

About Silicon Interfaces

Silicon Interfaces has experience in verification solutions and developing IP for Fabric Channel Interconnect, Telecom and Networking domains, including Bluetooth, Gigabit Ethernet, Firewire, Sonet, USB2, Infiniband, Rapid IO, WLAN and have a strong focused Roadmap to 10 Giga and SAN Controllers. Silicon Interfaces has been a provider of consulting services for ASIC/FPGA/SOC Verification and Designs using Verilog and VHDL, as well as services to support the EDA industries, for almost 10 years in Silicon Valley. The company has Design Centers in India with a complete high-end infrastructure for design services.

Synopsys is a registered trademark of Synopsys, Inc. OpenVera is a trademark of Synopsys, Inc. All other trademarks or registered trademarks mentioned in this release are the intellectual property of their respective owners.

Contact: info@siliconinterfaces.com

Source: Synopsys, Inc. Today's News On The Net - Business Wire's full file on the Internet

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